Showing posts with label delay. Show all posts
Showing posts with label delay. Show all posts

Friday, November 14, 2014

Delay program using 8051 timers

The 8051 microcontroller has two independent 16 bit up counting timers named Timer 0 and Timer 1 and this article is about generating time delays using the 8051 timers. Generating delay using pure software loops have been already discussed here but such delays are poor in accuracy and cannot be used in sensitive applications. Delay using timer is the most accurate and surely the best method.

A timer can be generalized as a multi-bit counter which increments/decrements itself on receiving a clock signal and produces an interrupt signal up on roll over. When the counter is running on the processor’s clock , it is called a “Timer”, which counts a predefined number of processor clock pulses and  generates a programmable delay. When the counter is running on an external clock source (may be a periodic or aperiodic external signal) it is called a “Counter” itself and it can be used for counting external events.

In  8051, the oscillator output is divided by 12 using a divide by 12 network and then fed to the Timer as the clock signal. That means for an 8051 running at 12MHz, the timer clock input will be  1MHz. That means the the timer advances once in every 1uS and the maximum time delay possible using a single 8051 timer is ( 2^16) x (1µS) = 65536µS. Delays longer than this can be implemented by writing up a basic delay program using timer and then looping it for a required number of time. We will see all these in detail in next sections of this article.

Designing a delay program using 8051 timers
While designing delay programs in 8051, calculating the initial value that has to be loaded inot TH and TL registers forms a very important thing. Let us see how it is done.
  • Assume the processor is clocked by a 12MHz crystal.
  • That means, the timer clock input will be 12MHz/12 = 1MHz
  • That means, the time taken for the timer to make one increment = 1/1MHz = 1uS
  • For a time delay of “X” uS the timer has to make “X” increments.
  • 2^16 = 65536 is the maximim number of counts possible for a 16 bit timer.
  • Let TH be the value value that has to be loaded to TH registed and TL be the value that has to be loaded to TL register.
  • Then, THTL =  Hexadecimal equivalent of (65536-X) where (65536-X) is considered in decimal.


Example
Let the required delay be 1000uS (ie; 1mS).
That means X = 1000
65536 – X =  65536 – 1000 = 64536.
64536 is considered in decimal and converting it t0 hexadecimal gives FC18
That means THTL = FC18
Therefore TH=FC and TL=18

Program for generating 1mS delay using 8051 timer
The program shown below can be used for generating 1mS delay and it is written as a subroutine so that you can call it anywhere in the program. Also you can put this in a loop for creating longer time delays (multiples of 1mS). Here Timer 0 of 8051 is used and it is operating in MODE1 (16 bit timer).

DELAY : MOV TMOD,#00000001B // Set Timer0 to MODE1(16bit timer).Timer1 not used
          MOV TH0,#0FCH // Loads TH0 register with FCH
          MOV TL0,#018H // LOads TL0 register with 18H
          SETB TR0 // Starts the Timer 0
HERE : JNB TF0,HERE // Loops here until TF0 is set (ie;until roll over)
       CLR TR0 // Stops Timer 0
       CLR TF0 // Clears TF0 flag
       RET

The above delay routine can be looped twice in order to get a 2mS delay and it is shown in the program below.

MAIN : MOV R6,#2D
LOOP : ACALL DELAY
       DJNZ R6,LOOP
       SJMP MAIN
DELAY : MOV TMOD,#00000001B
        MOV TH0,#0FCH
        MOV TL0,#018H
        SETB TR0
HERE : JNB TF0,HERE
       CLR TR0
       CLR TF0
       RET

Important points to remember while using timers
  • Once timer flag (TF) is set, the programmer must clear it before it can be set again.
  • The timer does not stop after the timer flag is set. The programmer must clear the TR bit in order to stop the timer.
  • Once the timer overflows, the programmer must reload the initial start values to the TH and TL registers to begin counting up from.
  • We can configure the desired timer to create an interrupt when the TF flag is set.
  • If  interrupt is not used, then we have to check the timer flag (TF) is set using some conditional branching instruction. 
  • Maximum delay possible using a single 8051 timer is 65536µS and minimum is 1µS provided that you are using a 12MHz crystal for clocking the microcontroller.


Square wave generation using 8051 timer
Square waves of any frequency (limited by the controller specifications) can be generated using the 8051 timer. The technique is very simple. Write up a delay subroutine with delay equal to half the time period of the square wave. Make any port pin high and call the delay subroutine. After the delay subroutine is finished, make the corresponding port pin low and call the delay subroutine gain. After the subroutine  is finished , repeat the cycle again. The result will be a square wave of the desired frequency at the selected port pin. The circuit diagram is shown below and it can be used for any square wave, but the program has to be accordingly. Programs for different square waves are shown below the circuit diagram.


1KHz Square wave using 8051 Timer
MOV P1,#00000000B
MOV TMOD,#00000001B
MAIN : SETB P1.0
       ACALL DELAY
       CLR P1.0
       ACALL DELAY
       SJMP MAIN
DELAY: MOV TH0,#0FEH
       MOV TL0,#00CH
       SETB TR0
HERE : JNB TF0,HERE
       CLR TR0
       CLR TF0
       SETB P1.0
       RET
END

2 KHz Square wave using 8051 Timer
MOV P1,#00000000B
MOV TMOD,#00000001B
MAIN : SETB P1.0
       ACALL DELAY
       CLR P1.0
       ACALL DELAY
       SJMP MAIN
DELAY : MOV TH0,#0FCH
        MOV TL0,#018H
        SETB TR0
HERE : JNB TF0,HERE
       CLR TR0
       CLR TF0
       SETB P1.0
       RET
END


10 KHz Square wave using 8051 Timer
MOV P1,#00000000B
MOV TMOD,#00000001B
MAIN : SETB P1.0
       ACALL DELAY
       CLR P1.0
       ACALL DELAY
       SJMP MAIN
DELAY : MOV TH0,#0FFH
        MOV TL0,#0CEH
        SETB TR0
HERE : JNB TF0,HERE
       CLR TR0
       CLR TF0
       SETB P1.0
       RET
END

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Wednesday, October 22, 2014

Long Delay Stop Switch

Presettable times for train stops in stations are indispensable if you want to operate your model railway more or less realistically according to a timetable. This circuit shows how a 555 timer can be used with a relatively small timing capacitor to generate very long delay times as necessary by using a little trick (scarcely known among model railway electronic technicians): pulsed charging of the timing net-work. Such long delays can be used in hidden yards with through tracks, for instance.  As the timer is designed for half-wave operation, it requires only a single lead to the transformer and one to the switching track or reed contact when used with a Märklin AC system (H0 or H1). The other lead can be connected to any desired grounding point for the common ground of the track and lighting circuits.
Circuit diagram :
Long-Delay Stop Switch-Circuit Diagram
Long-Delay Stop Switch Circuit Diagram

As seen from the outside, the timer acts as a monostable flip-flop. The output (pin 3) is low in the quiescent state. If a negative signal is applied to the trigger input (pin 2), the output goes high and C4 starts charging via R3 and R4. When the voltage on C4 reaches 2/3 of the supply voltage, it discharges via an internal transistor connected to pin 7 to 1/3 of the supply voltage and the output (pin 3) goes low. The two threshold values (1/3 and 2/3) are directly proportional to the supply voltage. The duration of the output signal is independent of the supply voltage: t= 1.1(R4 + R5) × C4 

if the potentiometer is connected directly to the supply line (A and B joined). The maximum delay time that can be generated using the component values shown in the schematic diagram is 4.8 minutes. How-ever, it can be increased by a factor of approximately 10 if the timing network is charged using positive half-waves of the AC supply voltage (reduced to the 10–16-V level) instead of a constant DC voltage. 

The positive half-waves of the AC voltage reach the timing network via D2, the transistor, and D3. Diode D3 prevents C4 from being discharged between the pulses. The total resistance of R4 and R5 should not be too high (no more than 10 MΩ if possible), since electrolytic capacitors (such as are needed for C4) have significant leakage currents. Incidentally, the leakage current of aluminium electrolytic capacitors can be consider-ably reduced by using a supply voltage well below the rated voltage. Capacitor C6 is intended to suppress noise. It forms a filter network in combination with an internal voltage-divider resistor.
If a vehicle happens to remain standing over the reed switch so the magnet holds the contacts constantly closed, the timer will automatically be retriggered when the preset delay times out. In this case the relay armature will not release and the locomotive will come to the ‘end of the line’ in violation of the timetable. This problem can be reliably eliminated using R6, R7 and C5. This trigger circuit ensures that only one trigger pulse is generated, regardless of how long the reed switch remains closed. RC network R8/C7 on the reset pin ensures that the timer behaves properly on switch-on (which is far from being something to be taken for granted with many versions of the 555 or 556 dual timer).
Reed switches have several special characteristics that must be kept in mind when fitting them. The contact blades, which are made from a ferromagnetic material, assume opposite magnetic polarities under the influence of a magnetic field and attract each other. Here the position and orientation of the magnet, the distance between the magnet and the reed switch, and the direction of motion of the magnet relative to the switch are important factors. The fragility of the glass hous-ing and the thermal stress from soldering (stay at least 3 mm away from the glass housing) require a heat sink to be used between the soldering point and the glass/metal seal. A suitable tweezers or flat-jawed pliers can be used for this pur-pose. If you need to bend the leads, use flat-jawed pliers to protect the glass/metal seal against mechanical stresses. 

Matching magnets in various sizes are available from toy merchants and electronics mail-order firms. They should preferably be fitted underneath the loco-motive or carriage. However, the magnet can also be fitted on the side of a vehicle with a plastic body. In this case the reed switch can be hidden in a mast, bridge column or similar structure or placed in a tunnel, since the distance must be kept to less than around 10 mm, even with a strong magnet. If fitting the circuit still presents problems (especially with Märklin Z-gauge Mini-Club), one remedy is to generate the trigger using a unipolar digital Hall switch, such as the Siemens TLE4905L or Allegro UGN3120. To avoid coupled-in interference, the stop timer should be fitted relatively close to the Hall sensor (use screened cable if necessary). Pay attention to the polarity of the magnet when fitting it to the bottom of the vehicle. With both types of sensors, the South pole must point toward the front face of the Hall IC (the face with the type marking). The North pole is sometimes marked by a dab of paint. Generally speaking, the polarity must be determined experimentally. 

Fitting the circuit is not a problem with Z-gauge and 1-gauge tracks, since the distance between the iron parts (rails) and the Hall switch is sufficiently large. In an HO system, some modifications must be made to the track bed of the Märklin metal track. Cut a suitably sized ‘window’ between one wheel rail and the centre rail in order to prevent secondary magnetic circuits from interfering with the operation of the sensor. Keep the distance between the magnet and the case of the Hall switch between 5 and 10 mm, depending on the strength of the magnet, to ensure reliable actuation.


http://www.ecircuitslab.com/2012/05/long-delay-stop-switch.html
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Friday, August 22, 2014

High And Low Voltage Cut Off With Time Delay Wiring diagram Schematics

The power line fluctuations and cut-offs cause damages to electrical appliances connected to the line. It is more serious in the case of domestic appliances like fridge and air conditioners. If a fridge is operated on low voltage, excessive current flows through the motor, which heats up, and get damaged.

The under/over voltage protection schema with time delay presented here is a low cost and reliable schema for protecting such equipments from damages. Whenever the power line is switched on it gets connected to the appliance only after a delay of a fixed time. If there is hi/low fluctuations beyond sets limits the appliance get disconnected. The system tries to connect the power back after the specific time delay, the delay being counted from the time of disconnection. If the power down time (time for which the voltage is beyond limits) is less than the delay time, the power resumes after the delay: If it is equal or more, then the power resumes directly.

This schema has been designed, built and evaluated by me to use as a protector for my home refrigerator. This is designed around readily available semi-conductor devices such as standard bipolar medium power NPN transistor (D313/SL100/C1061), an 8-pin type 741 op-amp and NE555 timer IC. Its salient feature is that no relay hunting is employed. This draw back is commonly found in the proctors available in the market.

The complete schema is consisting of various stages. They are: - Dual rail power supply, Reference voltage source, Voltage comparators for hi/low cut offs, Time delay stage and Relay driver stage. Lets now look at the step-by-step design details.

Dual rail power supply.
This is a conventional type of power supply as shown in Figure 1. The power is applied through the step-down transformer (230/12-0-12V/500mA). The DC proportional to the charging input voltage is obtained from bridge rectifier. Two electrolytics are there to bypass any spikes present. Bridge is capable of handling currents up to 1 Amp.
Output is given by: -
V(out) = 0.71 X V (secondary)
= 0.71 X 24V
= 17.04 V
(This equation is similar for the negative rail as well)

Circuit diagram

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Low voltage cut off op-amp
Figure 2 shows the use of very common and easily available op-amp 741 as a comparator. The op-amp is available in TO-5 and DIP type packing.

Circuit diagram

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In this ckt the zener diode D1 and it’s associated resistor R1 are connected to the non-inverting terminal (+ve) of 741 to give the suitable reference voltage. The DC voltage from the sensor is given to the inverting (-ve) terminal through pre-set R2.This is used to set the input level.
When the sensor input is less than Zener voltage the output from the Op-amp remains high and when it is greater than Zener voltage the output goes low. When the sensing voltage is equal to Zener voltage the output of the op-amp is approximately zero.
This phenomenon is used as a decision for switching the relay and to give cutoff in a low voltage situation.

High voltage cut off op-amp
Here the op-amp is used as a inverted amplifier. See Figure 3.Zener and resistor network gives reference voltage to the inverting terminal (-ve) of op-amp. Sensing voltage derived through the 10 K pre-set is given to the non- inverting (+ve) terminal and this sets the high level cut.

When the input DC from the sensor is less than Zener voltage the output of the op-amp is low and vice-versa. When the input DC voltage is equal to the zener voltage, the op-amps output is approximately zero.

Circuit diagram

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Time delay
I’ve selected the 555 timer due to following reasons.
1. Timing from microseconds through hours.
2. Ability to operate from wide range of supply voltages.
3. High temperature stability.
4. Easily Available.
5. Its triggering schema is quite sensitive.

This is basically a monostable. The external timing capacitor C2 is held initially discharged by the timer. The schema triggers upon receiving a pulse to its pin 2 when the level reaches 1/3 Vcc. Once triggered., the schema will remain in that state until the set time is elapsed or power to the schema cuts off. The delayed period in seconds is 1.1 C2.R1 where R1 is in megohms and C2 is in microfarads. In practice, R1 should not exceed 20 M. If you use an electrolytic capacitor for C2, select a unit for low leakage. The time delay may have to be adjusted by varying R1 to compensate for the wide tolerance of electrolytics.

Circuit diagram

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Relay Driver
The output from the voltage level detectors cannot directly drive the relay and hence the relay driver is used.

Circuit diagram

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In this a relay (12V <500 ohms) is connected to the collector of NPN transistor. The out put voltage from the comparator is applied to the base of NPN transistor through a resistance R1. When the output from the comparator is low the transistor is in OFF state and the relay is in de-energized state. Similarly when the output from the comparator goes high the transistor switches ON and the flow of current from the collector to emitter of transistor energizes the relay.

Generally in a relay driver schema, parallel to the relay coil, a diode or a capacitor is used. This is to eliminate the back e.m.f generated by the relay coil when currents are suddenly broken. Capacitor C1 is connected in parallel to the coil, which filters out the back emf but it, slows down the working of relay.

A better method is to connect two diodes (as shown in the figure 5) that stop the relay – transistor junction swinging more than 600mV above the positive rail or below the zero-volt rail. During normal operation the diodes are reverse biased and have no effect on the performance of schema. But when back emf is induced, the diodes conduct heavily and absorb all transient voltages. However, I have employed the both methods.
The Complete Circuit

Circuit diagram


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Under normal operating conditions i.e. when the input voltage is between maximum and minimum limit the output from the both the comparators are low. The transistor Q1 is OFF and the relay is in de-energized (pole connected to N/C pin) state and the output is obtained.

When the input voltage is below or above the limits set by the pre-sets R8 or R9, the output of the Op-Amps goes either low or high and diodes D1 or D2 would be forward biased depending on the situation. Transistor Q1 switches ON and the flow of current from collector to emitter energizes the relay and the output is cutoff.

A small amount of hystersis has been added via feed back resistors R10 & R11 so that the relay turns on when the level falls to a particular value but does not turn again until it raises a substantial amount above this value. Other wise the relay contacts will frequently turn on/off and produce chattering.

Construction Hints
1) I used a piece of varoboard, which has copper strips on one side to mount the components, and housed the entire schema and the transformer in a discarded ATX PC power supply box.

2) An autotransformer has been used to set the limits. Set the output of the autotransformer to 250V AC and connect it to the primary of transformer T1 (see Figure 1). Then adjust the pre-set R9 such that relay just energizes. This is the high limit. Next set the output of the autotransformer to 200V AC and adjust the pre-set R8 such that the relay energizes. Please note that these are my preferred limits but you may select any range from say 170 to 270V AC.

3) A neon with a suitable resistor could be connected between the AC supply lines as an ON indicator. Alternatively, LED with a current limiting resistor could be connected between the relay coil so when the relay is energized LED will indicate the situation.
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High Low voltage cut off with delay alarm



This straight forward schema will protect electrical appliances from over voltage as well as under voltage.The schema also produces an alarm when the power supply comes back.An ideal schema for home to protect your valuable equipments from voltage fluctuations.The same schema with some modifications can be used to make a automatic voltage stabilizer








When the mains voltage is in the normal level ,the voltage at the negative terminal of zener diode D4 will be less than 5.6 Volts.At this condition transistor T1 will not conduct.The same time voltage at the negative terminal of zener diode D5 will be greater than 5.6 and so the transistor T2 will be conducting.The relay will be activated and the green LED wil be glowing.

When the mains voltage is higher than the set limit the transistor T1 becomes conducting since the voltage at the negative terminal of D4 is greater than 5.6 V.At the same time transistor T2 will be non conducting which results in the deactivation of relay to cut the mains supply from load.When the mains voltage is less than the set limit transistors T1 & T2 becomes non conducting making the relay to de- activate and cut the load from mains.Ω

The timer NE555 is wired as a monostable multivibrator with a pulse width of 10ms.When the power comes back after a cut off a negative voltage is obtained at the trigger pin which triggers the IC NE555.The transistor T3 gets forward biased and it drives the buzzer to produce a beep as an indication of power resumption.Also the transistor T1 is made on which in turn makes T2 off.As a result the relay will remain de- activate for 10ms and this provides the sufficient delay and the equipment is protected from surge voltages.




Notes.

* To calibrate the schema a autotransformer is needed.Connect the output of autotransformer to the transformer primary.
* Set the voltage to 260V and adjust VR1 to make the relay deactivated.
* Now set the autotransformer to 160V and adjust VR2 so that the relay is de-energized.
* VR3 can be used to vary the volume of buzzer.


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