Schematic Volt

Battery-backup converter with one NiCd cell

Notebook computers and added carriageable accessories generally use a advancement array to absorb anamnesis accommodation during advancement of the capital battery. Such "bridge batteries" usually abide of bristles or six series-connected NiCd bread cells. Theyre accepted to accumulate the arrangement animate for about 5 minutes—plenty of time to bandy batteries. The ambit in Figure 1 reduces size, weight, and amount by application one NiCd corpuscle instead of bristles or six. A Saft VB4E 40-mAhr NiCd bread corpuscle has abundant accommodation to accumulate a archetypal anthology computer in append approach for about 10 minutes. All apparatus (excluding the bread cell) absorb beneath than 1/2 in.2 of pc-board area, and the amount accumulation from beneath beef advice pay for the added circuitry.

When its operational, the capital array provides ability to the systems dc/dc converters. The LT1304 addition advocate consistently monitors the dc/dc-converter ascribe via the acknowledgment affiliate absolute R3 and R4. Once the FB pin drops beneath 1.24V (corresponding to about 6V at the dc/dc-converter input), addition advocate IC1 begins switching. Accepted comes from B1, through L1, and into the SW pin on IC1. When IC1s centralized about-face turns off, the SW pin goes high, carrying accepted through D2 into the dc/dc converters ascribe capacitor, C4. C4 already exists for the dc/dc converter, so you allegation no added achievement capacitor.

The LT1304 switches at about 200 kHz; thus, L1 can be small. Switching occurs automatically as bare to authority the dc/dc converters ascribe at about 6V. Ability for IC1 is "bootstrapped" from the 5V dc/dc converters output, so it never needs to accomplish anon from the 1.2V NiCd bread cell. Should the advancement array anytime absolutely discharge, the 5V achievement drops beneath the LT1304s minimum operating voltage of 1.5V, and the absolute arrangement shuts down. At that point, the NiCd corpuscle becomes unloaded, thereby preventing overdischarge damage. Advancement operation is re-established alone afterwards the capital ability antecedent (main array or ac power) is adequate to the system.

It is generally all-important to accomplish a argumentation arresting to announce that the arrangement is accepting its ability from the advancement battery. This arresting can serve to afford amount (the advancement advocate cannot abutment abounding arrangement power) or to accessible a MOSFET about-face that prevents accepted from abounding aback into the capital battery. When the LT1304 is operating, the flyback beating present at the SW pin turns on Q1, thereby peak-charging C1 through D1. Once the voltage on pin 1 exceeds 1.17V (the LBI comparator threshold), the LBO open-collector disciplinarian is appear and pulled aerial by the resistors aural Q2.

You can affix the LBO arresting to argumentation chip or to a microcontroller input. LBO additionally turns off Q2 to attenuate charging during advancement operation. During accustomed nonbackup operation, LBO is low, befitting Q2 saturated. In this state, about 350 mA of charging accepted flows through R5 into the battery. You can calibration R5 for altered allegation currents as appropriate.